Description - Computer Arithmetic and Verilog HDL Fundamentals by Joseph Cavanagh
Comprehensive and self-contained, this text covers the design of various arithmetic circuits using Verilog HDL for fixed-point, decimal, and floating-point number representations. It contains examples using different algorithms for both combinational and clocked sequential arithmetic circuits. The text presents topics in computer arithmetic, such as residue checking, parity prediction, logical and algebraic shifters, and arithmetic and logic units (ALUs). The text also features Verilog HDL projects which include the design module implemented using built-in primitives, dataflow, behavioral, or structural modeling, the test bench module, the outputs, and the waveforms obtained from the simulator to illustrate complete functional design operation. All designs are carried through to completion.
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